M.E.(Digital Electronics) B.E. (Electronics and Telecommunication Engg.)

 Teaching: 7 Years

 Microprocessor
 Microcontroller
 Control System Engineering
 Network Analysis
 Electronic circuits design

 Associate Member of Institution of Electronics and Telecommunication Engineering
 Life Time Member of Indian Society of Technical Education.

 "Design of Multiplexer using CMOS TERNARY LOGIC” V.S. Ingole, Prof.V.T.Gaikwad / International Journal of Engineering Research and Applications (IJERA) Vol. 2, Issue 2,Mar-Apr 2012, pp.1591-S.ISSN: 2248-9622.
 "Design of CMOS INVERTER based on TERNARY LOGIC” V.S.Ingole, Prof.V.T.Gaikwad Proceedings of International Conference of ‘Benchmarks in Engineering Science and Technology (IC-BEST) 7-8 September 2012.
 "Design of Ternary NAND Gates Using Ternary Transmission Gates” Asst.Prof.V.S.Ingole, Dr.R.M.Deshmukh, International Journal of Pure and Applied Research in Engineering and Technology 29th March 2014.
 “Design and implementation of low power ternary decoder”, Asst.Prof.V.S.Ingole, Dr.V.T.Ingole, International Journal of Pure & Applied Research in Engineering & Technology, 2016.
 “Optimization of CMOS devices in multi valued logic decoder” Asst.Prof.Vikram S.Ingole, Prof. Vinay U. Kale, Dr.Vijay.T.Ingole, International Journal of Scientific & Engineering Research, Volume 7, Issue 11, November-2016 1325 ISSN 2229-5518.
 “Design & Implementation of Digital to Digital Converter comprising Binary Logic to Ternary Logic” Vinay U. Kale, Vijay T. Ingole, Vikram S. Ingole ,Ashwin K. Thakur, International Journal of Advanced Scientific and Technical Research Issue 7 volume 1, January –February 2017

 Design Ternary Based Arithmetic and logical Unit
 Design Ternary to Binary Converter/Binary to Ternary Converter

 Awarded as Best paper in international conference at BDCOE Sevagram.