Dr. S. B. Patil

Dr. S. B. Patil

Professor & CEO-SGIARC-TBI
Email/Mobile No. :Email: sbpatil@ssgmce.ac.in
Phone: +91 7020799970

ACADEMIC QUALIFICATION

BE, ME, MBA, Ph.D.(VLSI- Electronics Engineering)

AREA OF SPECIALIZATION VLSI-Analog/RF/Mixed Signal, Embedded System
EXPERIENCE

Teaching:17 Years
Industrial:02 Years

COURSES TAUGHT

VLSI
Digital system Design
Electronics Devices and Circuits
Analog & Digital Integrated Circuits
Microcontroller Applications

ORCID ID/ SCOPUS ID/ Web of Science ID/ VIDWAN ID/ RESEARCHER ID/Google Scholar ID:
MEMBERSHIP

IEEE
IETE
ISTE

PUBLICATIONS
  • Dr. S.B. Patil, Design of Anti-Theft and Tracking System for Vehicle Protection by Biometric Authentication in International Journal of Engineering Science & Technology View
  • Vivek S. Mate , Dr. S.B. Patil, Prof. A.N. Dolas , Detection, Location And Picking Of The Object Based On Machine Vision, International Research Journal of Engineering and Technology (IRJET), Vol. 05 Issue 04 ,PP-4750- 4752, Apr-2018.
  • Dr. S. B. Patil Prof. V. K. Bhangadiya,and Ms. Pranali P. Chavhan, Haar Wavelet based Iris Recognition for High Security Access Environment, International Journal of Innovative Research in Science, Engineering and Technology, Vol. 6, Issue 5,PP-8433- 8438, May 2017
  • Pranali Chavhan, Dr. Santosh B. Patil, Haar Wavelet based Iris Recognition System for Secure Access using MATLAB, International Journal of Innovative Research in Computer and Communication Engineering, Vol. 5, Issue 6, PP-11806- 11812, June 2017
  • Sachin S. Malode and Dr. S.B. Patil, Highly Secured Locker System Based On Biometric Identification, International Journal Of Pure And Applied Research In Engineering And Technology (IJPRET), Volume 4 (9),PP- 285-293, June-2016
RESEARCH AND DEVELOPMENT

Industrial solutions: 1. Automatic Fault Detection and Counting Mechanism and Analysis for Bhogle Automotive, Aurangabad 2. Transceiver IF IC Development for 5G mm Wave Radio using UMC 180nm Technology for SM Technologies Pvt.Ltd Pune

RESEARCH GUIDANCE
FDP/STTP/Workshop/Training Programme Attended / Organized
FELLOWSHIP / AWARD

Project- Design of Operational Trnsconductance Amplifier Winner of first ever national level 'Cadence India Design Contest'. Won cash prize of Rs. 1.5 lack and reorganization at national level project competition organized by Cadence Design Systems (I) Pvt. Ltd., Bangalore, INDIA and CDNLive! India- part of Cadence's global series of technical conferences in 2006

OTHER

Research Guided
M.E. - More than 15 students